Method of finding data dependent timing and voltage jitter for different bits in an arbitrary digital signal in accordance with selected surrounding bits

ABSTRACT

Separation and analysis of measured Total Jitter (TJ) begins with a suitably long arbitrary digital test pattern, from which an Acquisition Record is made. A Time Interval Error (TIE) or Voltage Level Error (VLE) Record is made of the Acquisition Record. A Template defines a collection of associated bit value or transitions that are nearby or otherwise related to a bit location of interest, and has associated therewith a collection of Descriptors and their respective Metrics. Each Descriptor identifies one of the various different patterns of bit value or transitions that fit the Template. The TIE/VLE Record is examined, and a parameter is measured for each instance of each Descriptor for the Template. The collection of measured parameters for each particular Descriptor are combined (e.g., averaging) to produce the Metric for that Descriptor. A Look-Up Table (LUT) addressed by the different possible Descriptors is loaded with the associated discovered Metric, which is a plausible value for Data Dependent Jitter (DDJ) at that bit. DDJ separates from TJ because DDJ is correlated with the Descriptors, while Periodic Jitter (PJ) and Random Jitter (RJ) can be expected to average to near zero over a sufficient number of instances of a given Descriptor. Identified instances of DDJ are individually removed from corresponding locations of TJ found for the entire waveform (the original TIE/VLE Record) to leave an Adjusted TIE/VLE Record that is PJ convolved with RJ.

REFERENCE TO RELATED PATENTS

The subject matter of this patent application is related to that of U.S.patent application Ser. No. 10/354,598 entitled CHARACTERIZING JITTER OFREPETITIVE PATTERNS filed 29 Jan. 2003 by Roger Lee Jungerman andassigned to Agilent Technologies, Inc. For the sake of brevityCHARACTERIZING JITTER OF REPETITIVE PATTERNS is hereby incorporatedherein by reference. The subject matter of this patent application isalso related to that of U.S. patent application Ser. No. 10/685,027entitled METHOD AND APPARATUS FOR DECOMPOSING SIGNAL JITTER USINGMULTIPLE ACQUISITIONS filed 14 Aug. 2003 by Steven D. Draving andassigned to Agilent Technologies, Inc. For the sake of brevity METHODAND APPARATUS FOR DECOMPOSING SIGNAL JITTER USING MULTIPLE ACQUISITIONSis also hereby incorporated herein by reference. The subject matter ofthis patent application is further related to that of U.S. patentapplication Ser. No. 10/929,194 entitled METHOD AND APPARATUS USERE-SAMPLED TIE RECORDS TO CHARACTERIZE JITTER IN A DIGITAL SIGNAL filed30 Aug. 2004 by Steven D. Draving and Allen Montijo and assigned toAgilent Technologies, Inc. For the sake of brevity METHOD AND APPARATUSUSE RE-SAMPLED TIE RECORDS TO CHARACTERIZE JITTER IN A DIGITAL SIGNAL isalso hereby incorporated herein by reference.

BACKGROUND OF THE INVENTION

High speed digital systems, whether for computational or communicationspurposes, rely on the ability to correctly ascertain the logical valueof a binary data signal at specific times. A series of such consecutivelogical values will represent either data or control information, and ifsatisfactory performance is to be achieved in a modern high speed systemthe error rate in ascertaining the logical values may need to be verylow, often only one error in 10¹² bits, or even less. In a digitalsystem there are abrupt transitions between the logical values, and thenominal period of time that the data signal represents a particularlogical value is called the UI (for Unit Interval). Generally there isprovided (or derived) another signal, called a clock signal, whoseperiod is also the UI and whose abrupt transitions in a selecteddirection serve as the ‘specific times’ (mentioned above) at which thelogical value of the data signal is to be ascertained, a process oftentermed ‘sampling.’

In an ideal world, all edges in the data signal would occur at locationsalong a time axis that were an exact UI apart, or at exact multiples ofthe unit interval. Likewise, the transitions in the clock signal wouldalways occur at locations along the time axis that describe exactly aseries of consecutive unit intervals. It is common for the phase of theclock signal to be adjusted relative to the transitions in the datasignal such that the sampling according to the clock signal will occurin the middle of the unit interval of the data signal. That is, whilethe UI of the data signal is the same as the UI of the clock signal,their edges don't coincide, but are instead staggered.

The ‘rattle’ in the edges of a signal that is supposed to transitiononly at particular times (here, at the expiration of consecutive unitintervals) is called jitter. In today's high performance digitalsystems, the presence of jitter in the data signal and in the clock hasa significant effect on the system's ability to correctly ascertain thelogical value of the data signal. There are other error causingmechanisms, to be sure, but if a high speed digital system is to offergood performance it needs to have low jitter (say, 1/1000 UI RMS, orless).

To reduce jitter one generally has to locate its source, and it turnsout that it is useful and productive to recognize several differenttypes of jitter. It is now common for test equipment intended for usewith high performance digital systems to include in their repertoire ofoperations automated measurements of jitter, and to do so whilerecognizing several different types of jitter, each of which can beseparately characterized. Total jitter is the aggregate amount ofobservable jitter, and is (or ought to be) the ‘sum’ of all the varioustypes of component jitter that can be recognized.

There are wide variations among techniques for jitter measurement. Inparticular, there are some ‘brute force’ techniques that perform all ofN-many trials, and which can seem to take forever (hours, or even days!)to get accurate results having resolution in parts in 10¹². Even if theUI is one nanosecond, it still takes over twenty minutes to measure 10¹²of them. And some techniques require N-many repetitions of a suitabletest pattern that is in the range of one hundred or a thousand UI inlength. Clearly, such brute force approaches are not suitable forquickly characterizing expected low rates of jitter.

Various strategies have been developed to cope with this situation.These often revolve around assuming that some of the jitter is random innature, with the rest arising from various other mechanisms. The idea isthat, if the nature of a component source of jitter is known, then itcan be represented by a suitable model. The significance of this isthat, while the model needs coefficients to produce greater or lesseramounts of jitter, the shape of the probability distribution of thatjitter component is specific to the model, so that the particularcoefficients for a specific instance can be found by curve fittingtechniques operating on a proper collection of samples. The plan (for,say, random jitter) is to sample for a reasonable amount of time, do acurve fit to instantiate the model, and then let the model predict withsome confidence what we would get if we let the measurement run toconclusion using brute force techniques. Clearly, if that is the plan,then we need to have at hand data that represents only that one kind ofjitter; otherwise the model will be inaccurate.

Now a new set of difficulties arises. The measured data will contain theeffects of all the different types of jitter. These include PeriodicJitter, Random Jitter and Data Dependent Jitter that is correlated withthe content of the data itself. It is not possible to readily directlymeasure samples that pertain to only a particular component type ofjitter, since we can't observe those types in isolation: the measureddata will generally include the combined effects of all types of jitter.Not only must indirect methods be developed to separate from thecombined result the data for individual types of jitter (so that modelsor other analysis can be applied to appropriate data), but there is morethan one way to decompose into components the combined jitter that isactually measured.

We are particularly interested here in a jitter measurement techniquefor discovering Data Dependent Jitter and that is useable in a real timeDigital. Sampling Oscilloscope (DSO) or comparable environment toproduce credible and valid results in seconds instead of hours. Whilethere are various techniques that are known for measuring Total Jitterand separating out Data Dependent Jitter, each suffers from somedisadvantage. For example, one technique operates quickly, but does notpreserve observed frequency information for Periodic Jitter, which isuseful diagnostic information for an attempt to eliminate such jitter.As a second example, another technique does not readily allow thecombining of multiple measurements to obtain a more accurate answer.Still another disadvantage of some conventional techniques is that theyrequire repetitions of a particular test signal, and may not accommodatean arbitrarily long test sequence. This means the system must, at leastto some degree, be removed from service for testing. There is a need fora Data Dependent Jitter measurement technique using a real time DSO orTiming Analyzer that operates quickly, preserves useful ancillaryinformation, whose resolution scales with longer measurement times, andthat tolerates a test sequence of arbitrary length and content thatmight either be random or be actual ‘live’ data measured while thesystem was in operational use. It should also be able to measure notonly the timing jitter of edges in the signal, but also characterizevoltage variations exhibited in the asserted logic levels (HIGH/LOW,TRUE/FALSE). What to do?

SUMMARY OF THE INVENTION

Measurement, separation and analysis of Data Dependent Jitter in aSystem Under Test begins with the production of a suitably long digitalarbitrary Test Pattern which may contain a random sequence of bitvalues, or, which might be actual live data. An Acquisition Record ismade of the entire arbitrary test pattern. (That is to say, the digitaldata may be sampled using the techniques found in modern high speed realtime DSOs, in which case a suitably dense representation of the actualanalog waveform of the sampled digital signal is reconstructed withDigital Signal Processing (DSP) techniques, and the sequence of logicalvalues found from inspection of that reconstruction. Alternatively, ahigh speed timing analyzer can directly provide the Acquisition Recordfrom accurately noted time of edge occurrence and direction oftransition information that arises from actual hardware-based thresholdcomparison, and no reconstruction is required.) For analysis of timingjitter, a complete Time Interval Error (TIE) Record is made from aninspection of the locations of the edges in the Acquisition Record. Thismay be accomplished with the help of an associated clock signal thateither accompanies the data signal of interest or that is derivedtherefrom. Analysis of voltage jitter (noise) is possible forAcquisition Records that are reconstructions of the actual analogbehavior of the Test Pattern. To accommodate that analysis a VoltageLevel Error (VLE) Record is created that is comparable to a TIE Record.

A user of a jitter analyzer defines a Template that is a collection ofassociated bit behaviors at bit locations that are nearby or otherwiserelated to a (reference) bit location of interest, but whose locationsneed not be contiguous or adjacent. Bits have values, and whenconsecutive bit locations have different values there is an edgeseparating them, which will be a transition that is either rising orfalling. A Template can be defined as either bit values or astransitions. Since edges and transitions occur between bit locations, itwill be convenient to associate an edge or transition with the bitlocation that follows it. This will allow us to adopt a less cumbersometerminology that embraces both bit values and transitions. (And, itwould not matter if we adopted the convention that an edge or transitionwas associated with the bit location that preceded it, so long as wewere consistent about it.) So, our ‘bit behaviors at bit locations’ areeither bit values or transitions, or, perhaps a mixture of both.Examples of a Template might be the two bit values (or transitions)before and the two bit values (or transitions) after the bit value (ortransition) of interest, or, the three bit values (or transitions) priorto the one of interest. The nature of the expected source of jitter mayinfluence the nature of the Template. An electrical structure involvinga transmission line that is causing reflections might use a Templatehaving groups of one or several bits where the groups are separated by anumber of bit positions; the accumulated Unit Intervals for theseparating bit positions is related to the length and propagationvelocity along the transmission line.

A Template has associated therewith a collection of Descriptors andtheir respective Metrics. Each Descriptor identifies one of the variousdifferent patterns of bit values (or transitions) that fit the Template.For example, the ‘two before/two after’ bit value Template can have (atmost) thirty-two different ways that it can occur (‘two before’ plus‘two after’ plus the one of interest that is ‘in the middle’ is fivetwo-valued bits, for 2⁵=32 different patterns, although a need for anedge to occur can cut the number of possibilities in half). Bittransition information is three-valued (rising edge, falling edge, or nochange) so a ‘one on either side’ transition Template could have at most3³=27 different instantiations, although not all these are realizable,since two consecutive transitions in the same direction are not allowedin conventional two-valued (binary) digital systems. (It will be notedthat any desired legitimate transition Template can also be expressed asa collection of one or more corresponding bit value Templates.) In anyevent, the complete TIE Record (or VLE Record) is examined inconjunction with a reconstruction (Acquisition Record) of the actualwaveform of the Test Pattern, and the various instances of the sameDescriptor are noted in the reconstructed waveform, for each differentDescriptor. A parameter associated with the Template is measured fromthe TIE or VLE Record for each instance of each Descriptor in theTemplate. For example, the signed amount of TIE for the bit position ofinterest that locates the position of the Template along the waveformmight be such a parameter. The collection of measured parameters foreach particular Descriptor are combined (e.g., averaging) to produce theMetric for that Descriptor. A Look-Up Table (LUT) addressed by thedifferent possible Descriptors is loaded with the discovered Metric thatis associated with each Descriptor.

Such a LUT can be used to separate Total Jitter (TJ) into one portionthat is Data Dependent Jitter (DDJ) and into another portion that isPeriodic Jitter (PJ) convolved with Random Jitter (RJ). The separationworks because: (1) Total Jitter is the ‘sum’ of those two portions andno others; and (2) DDJ is correlated with the Descriptors, while PJ andRJ (and thus also their convolution) can be expected to average to nearzero over a sufficient number of instances of a given Descriptor. Thatcondition of ‘self-cancellation’ can be expected to obtain if the testpattern is long compared to the size of the Template. Once that LUT iscreated a plausible value of DDJ can be imputed to each bit position inthe test pattern by using the Descriptor associated with that bitposition as an index to address the LUT and obtain the Metric storedtherein. DDJ for timing jitter involves using bit positions that haveedges, while DDJ for voltage noise does not require that there be anedge at a bit position. The identified instances of DDJ can then beindividually removed from the corresponding locations of the originalTIE/VLE Record for the measured TJ to produce an Adjusted TIE/VLE Recordrepresenting PJ convolved with RJ, and conventional techniques may thenbe used to perform further separation and analysis for that jitterpresent in the remaining difference.

The LUT could be replaced with a closed form computational rule thatused as its input variables an ordered numerical representation of thevarious Descriptors, and that when evaluated produced the Metric thatwould otherwise have been stored in the LUT for the correspondingDescriptor. Such a computational rule can be found with conventionalcurve fitting techniques once the various Metrics have been found.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a prior art diagram illustrating a preferred manner ofdecomposing total jitter into deterministic jitter and random jitter;

FIG. 2 is a prior art diagram illustrating that a histogram representingtotal jitter can be decomposed into separate probability distributionsrepresenting deterministic jitter and random jitter;

FIG. 3 is a prior art diagram illustrating the notion of a TIE Recordfor a Data Acquisition Record and a prior art histogram producedtherefrom to estimate total jitter;

FIG. 4 is a diagram illustrating the production of an Acquisition Recordarising from the sampling of digitized values or the discovery oftransitions through comparison against a threshold and the subsequentproduction therefrom of a collection of Descriptor TIE Recordsassociated with a specified Template;

FIG. 5 is an illustration of a Look Up Table that associates a Metricfor DDJ with the various Descriptors that occur for the specifiedTemplate;

FIG. 6 is a diagram illustrating the notion of subtracting a DiscoveredDDJ TIE Record created using the Look Up Table of FIG. 5 in conjunctionwith the discovered bit pattern of the Test Pattern of FIG. 4 from themeasured Original TJ TIE Record to produce an Adjusted TIE Recordcontaining PJ convolved with RJ;

FIG. 7 is a simplified block diagram illustrating a real time DSOhardware environment within which the invention may be practiced;

FIG. 8 is a simplified block diagram illustrating a Timing Analyzerhardware environment within which the invention may be practiced; and

FIG. 9 is a diagram illustrating that the invention may be used tocharacterize voltage jitter (noise).

DESCRIPTION OF A PREFERRED EMBODIMENT

Refer now to FIG. 1, wherein are shown some relationships between thevarious types of jitter with which we shall be concerned. FIG. 1 is adiagram 1 describing a paradigm we shall use in understanding jitter. Itbegins at the top with the notion that there is something called TJ(Total Jitter) 2. It represents all the aggregate jitter that is presentin the system being measured. It is the thing that, while in principlecan be measured by direct observation, takes too long to discover bysuch a brute force method. It will be appreciated that wherever we usethe term ‘jitter’ it applies to either timing jitter or voltage jitter(noise), unless there is, either specifically or through the context, anindication that only one or the other is meant.

In the paradigm of FIG. 1, TJ 2 is composed exactly of two componentparts, one of which we call DDJ 3 (Data Dependent Jitter) and the otherof which is the combination (4) of PJ{circle around (×)}RJ. Thiscombination 4 is of Periodic Jitter (PJ) 7 convolved with Random Jitter(RJ) 8. Note that both representations describe probability densityfunctions. This leads us to the observation, which will be familiar tothose who operate with probabilities, that the proper method ofcombining, or summing, two probability density functions such as 7 and 8is convolution, which operation is indicated by the symbol {circlearound (×)} (10).

RJ 8 is assumed to arise for inescapable natural reasons, after thefashion of thermal noise or quantum effects, and is further assumed tobe Gaussian in nature. PJ 7 is jitter that has a strong periodiccontent, say, for example, that a strong periodic signal from anothersystem is coupled via cross talk into the system being measured. Itmight have no correlation whatsoever to the SUT (System Under Test), butis nevertheless regular. And while the presence of PJ in our paradigmallows for this sort of thing, we don't demand that it actually bethere. That is, in some SUTs there might not be any detectable PJ.

The other component of TJ 2 is DDJ 3. This is jitter that is caused by,or is correlated with, the particular patterns of bits in the data beingtransmitted. It turns out that there are mechanisms that allow what hasalready been sent, or that will be sent, to affect the reception of thebit currently being received. (‘Already been sent’ seems benign enough;perhaps local heating or cooling related to certain activity in the datadisturbs thresholds or alters rise or fall times. But ‘will be sent’might seems as if it requires an effect to precede its cause. Not toworry. The idea is that a complex transmitting mechanism, such as aSERDES, say, has a highly pipelined parallel architecture with bussesinterconnecting FIFOs and registers all susceptible to cross talk, andthat the complex transmitting mechanism DOES ALREADY CONTAIN the evildata that is the ‘cause.’ That data just hasn't been sent yet over thetransmission path to the receiver, and the jitter will get into the dataas it is sent. Thus, causation still precedes its effect, and nomysterious metaphysics is required.) Since these phenomena are alreadyreported in the literature, we needn't dwell on them further. Onemeasure of such DDJ is ISI 5 (Inter-Symbol Interference) and another isDCD 6 (Duty Cycle Distortion). Those seeking further information aboutthese measures of jitter are referred to the incorporated patentapplications and the product literature cited in the incorporated METHODAND APPARATUS USE RE-SAMPLED TIE RECORDS TO CHARACTERIZE JITTER IN ADIGITAL SIGNAL.

Finally, we group ISI, DCD and PJ together as DJ 9 (DeterministicJitter). It will be appreciated that while the DDJ portion of DJ isseparable into ISI and DCD, those components are not necessarilyindependent nor mutually exclusive, and they generally do not combine byconvolution. In any event, the intent of this grouping is that DJ 9 isall jitter that is not truly random in nature (RJ, 8), but that iseither somehow correlated with the data, or is downright periodic, whichin neither case fits our intuitive notion of ‘random.’ An importantdifference between RJ and DJ is that RJ has (in principle) a PDF(Probability Density Function) with an infinite domain, while DJ has aPDF whose domain is bounded.

Refer now to FIG. 2, wherein is shown a histogram 11 representative ofTotal Jitter. Total jitter is the actual aggregate amount of jitter thesystem exhibits, from whatever source. It is what is directlymeasurable, although it generally takes way too long to do so directlyfor the small amounts of jitter that are at present consideredreasonable. Histogram 11 is not one that has been directly obtained bybrute force measurements, although suppose for a moment that it is. Sucha histogram is indeed an item that we would like to have (even if wedon't actually have it), and we are showing it (11) in the abstract andin the spirit of saying “Well, there exists some histogram thatdescribes the total jitter, and let's suppose that this (11) is it.” Itis a histogram of probability versus percent error in UI. That is, theamounts of jitter, while they could be described as absolute times, areinstead described as position errors that are early or late arrivals interms of the UI. The probability axis represents the likelihood that anedge occurred with that amount of position error. Now, in this regard,it may be tempting to think that the only possible errors are fractionsof a UI. For some systems this would be a reasonable assumption. But weare operating at very high speeds for data streams of significantlength. A slight drift in the data rate can accumulate errors to producea transition location having more than a UI of error, when compared tothe ideal correct time of signal transition.

To continue, then, our plan is to assert that there exists somehistogram 11 describing Total Jitter, and argue that, whatever it is,that Total Jitter can be decomposed into Random Jitter and DeterministicJitter. That is, we will assume that such a decomposition is a truepartition of the Total Jitter: i.e., any type of jitter is either in onecategory or the other, and that none is in both. This leads us to assertthat there is some representation 12 for Deterministic Jitter 9 that canbe combined with a representation 13 for Random Jitter 8 that “adds upto” the histogram 11 for the Total Jitter. We note that we expect theDeterministic Jitter to usually be discrete and static, as indicated bythe collection of spectra-like lines 14 (note we are not accusing themof being spectral components in the signal . . . just that their shapesresemble a displayed spectra). We also expect the Random Jitter tofollow some plausible distribution found in nature, such as a Gaussianone represented by distribution 15.

In FIG. 3 an acquired data waveform 16 is depicted, along with athreshold 17 against which the data waveform 16 is compared fordetermining the logical values of TRUE and FALSE in a test pattern. Inthis example, the portion 18 of data signal 1 conveys a logical value ofTRUE (a logic ONE), while portion 19 conveys a logical value of FALSE (alogic ZERO). We are not in this figure indicating how the time variantwaveform of the data signal 16 is measured. That can be done indifferent ways, depending upon the nature of the test equipment. As anexample that we are interested in, a real time DSO would digitizediscrete sampled locations of the waveform at known times therealong.(It will be appreciated that for high speed signals there may be onlyten or less samples per cycle, but that this does not present a problem,since the ‘scope relies on a DSP (Digital Signal Processing) implementedreconstruction filter protected by the Nyquist limit to ‘fill in thedots.’) In any event, the test equipment would ultimately have in itsacquisition memory a data structure called an Acquisition Record thatrepresents the waveform of the data signal. We also are not in thisfigure indicating how the logical pattern in use is discovered from thereconstructed waveform according to the relationship between thewaveform of the data signal 16 and the threshold 17. The pattern might,by simple agreement, be known ahead of time. To enforce that might,however, be quite inconvenient. Post processing by the DSO of theAcquisition Record 1 can reveal the sequence of logical values itcontains, should that be desirable (which for us it will be). Anotherpossibility is coupling the input signal to an actual hardwarecomparator having an actual threshold that produces an actual collectionof logical ONEs and ZEROs from time stamped transitions (which would behow a Timing Analyzer acquires data, and in which case there probablywould not be any separate samples that need DSP).

To continue in the DSO case, the samples representing the AcquisitionRecord 16 can be processed with DSP techniques and/or interpolation todiscover with suitable precision the locations along a time axis when anedge in the data signal crossed the threshold 17. With a correctly setthreshold (very probably one set in the middle of the signal's voltageexcursion), jitter, if it is present, will cause the time locations ofthe threshold crossings to vary from the ideal sequence of consecutiveU's. This is shown in the middle portion of the figure, wherein isdepicted an ideal time reference line 20, appended to which areindications of correct (21), early (22) and late (23) transitions. Thelength of these appendages is indicative of the degree of error. It isclear that if a Timing Analyzer provided time stamped transition data(as opposed to a DSO's digitized samples), the same correct/early/lateactual time of transition information can be produced.

The process of discovering the Time Interval Error for an edge involvesknowledge of what the UI ought to be, and that information might arisefrom how a clock signal that is supplied by the SUT, or that isrecovered from its data, exhibits a transition in a particulardirection. It might involve the phase locking of a time base in the DSOor Timing Analyzer to one in the SUT, since even precision laboratorygrade time bases that are independent can be expected to drift relativeto one another by amounts that correspond to significant amounts ofjitter in a high speed system.

As an aside, we wish to point out that, although FIG. 3 is drawn asthough each ideal UI is expected to be the same length of time, thisneed not be the case. There are systems where the UI varies on purpose.If we were to measure jitter in such a system we would presumably beinformed about the nature of such variations, and could still correctlydetermine the errors that occur. We might then normalize these errors tobe expressed as a percentage of expected UI, so that the members of acollection of such transition data are commensurable.

The bottom portion of FIG. 3 is a representation of a TIE (Time IntervalError) Record 24 that is prepared from the information depicted in theparts of the figure already described. The TIE Record is a descriptionof the observed jitter, and corresponds to total jitter. Uponreflection, it will be appreciated that such a TIE record 24 is, interms of information content, superior to a histogram, such as 11 inFIG. 2, in that actual instances of jitter are still embedded in theirsurrounding circumstances. (This is not to impugn the utility of thehistogram 11; it readily conveys useful information by its shape thatremains concealed within a TIE record such as 24.) One prior arttechnique, described in the incorporated METHOD AND APPARATUS FORDECOMPOSING SIGNAL JITTER USING MULTIPLE ACQUISITIONS constructs ahistogram (25) from the TIE data, and then uses that histogram as thebasis for a model from which to make estimates of other types of jitter.

Henceforth, when we refer to a TIE Record, we shall have in mind a datastructure implemented in the memory of suitable test equipment, such asa real time DSO or Timing Analyzer, which contains time interval errorinformation of the sort depicted in the lower third of FIG. 3 (althoughwithout the histogram at the right-hand end), and that has been derivedfrom circumstances similar to those set out in the top two portions ofthat figure.

Now refer to FIG. 4, which is a diagram illustrating a series of stepsthat are performed in accordance with the principles of the invention todiscover a description of DDJ, allow its use and subsequent removal froma description of measured TJ in pursuit of further analysis of PJconvolved with RJ. In Step I an arbitrary Test Pattern is represented inan Acquisition Record 26 as either consecutive samples meeting theNyquist requirements or as consecutive directed transitions. ThisAcquisition Record 26 is created by a suitable measurement process, andis the basis for the jitter measurements to follow. The Test Pattern is,in principle, arbitrary, in that it may be random data, live data orsome other favorite sequence of bits prized for some special property.What is really required is that the Test Pattern be ‘long’ in comparisonto patterns that produce DDJ and that it include a reasonable and fairnumber of the various bit sequences in the data that the SUT is expectedto cope with. Pseudo random data is usually ideal for this purpose,although it is believed that live data generally works about as wellprovided that a long enough Acquisition Record is obtained. It won'tgenerally be harmful if the data includes lopsided distributions ofparticular bit patterns, so long as others that are of interest arepresent in sufficient respective instances to provide the necessarydegree of self-cancellation for PJ and RJ. The technique to be describeddoes not rely on the notion that all instances of self-cancellation areequally good (not even pseudo random data will always guarantee that);it only requires that the self-cancellation for each instance is ‘goodenough.’

In Step II the bit pattern 27 for the arbitrary Test Pattern isdiscovered, if it is not already known. For example, the discovery maybe made in a real time DSO environment, where the Acquisition Record isconsecutive digitized samples, by applying DSP to those samples toobtain a rendered result that is suitably dense and then comparing thatagainst a threshold that is, say, midway between average maximum andaverage minimum values.

In Step III a complete Original TIE Record 28 is created from aninspection of the bit pattern produced in Step II. As described inconnection with the bottom portion of FIG. 3, each edge in the TestPattern gets a signed value that is the error in expected time ofoccurrence for that edge. Ascending lines indicate late transitions,descending lines represent early transitions, while in each case thelength of the lines represents the amount of the error. A dot indicatesa zero length line, and no error for the corresponding edge. Of course,the TIE Record is numerical data stored in a memory-based datastructure, and is not actually stored as an image as is seen in thefigure. (It will naturally be appreciated that the image in the figureis merely a convenient way to indicate the kind of information that isin the data structure.)

Now consider Step IV. Assuming that the user, or some other agency, hasspecified a Template that can be understood as a collection of eitherbit patterns or transitions in the Test Pattern, there will be aDescriptor that identifies each member of such a collection defined bythe Template. As mentioned in the Summary Of The Invention, examples ofa Template might be the two bit values/transitions before and the twobit values/transitions after the bit value/transition of interest, or,the three bit values/transitions prior to the one of interest. Thenature of the expected source of jitter may influence the nature of theTemplate. An electrical structure involving a transmission line that iscausing reflections might use a Template having groups of one or severalbits where the groups are separated by a number of bit positions, suchthat the accumulation of Unit Intervals for the separating bit positionsis related to the length and propagation velocity along the transmissionline. Each Descriptor identifies one of the various different patternsof bit values/transitions that fit the Template. For example, the ‘twobefore/at/two after’ bit value Template can have thirty-two differentways that it can occur (‘two before’ plus ‘two after’ plus the one ofinterest that is ‘at’ is five two-valued bits, for 2⁵=32 differentpatterns). Upon reflection it will be appreciated that such a Template,when used for a voltage jitter (noise) measurement, can indeed have allthirty-two different values. There can be voltage noise for the ‘at’ biteven when one or both adjacent bit locations have the same bit value asthe ‘at’ bit (i.e., there is not an ‘at’ edge).

On the other hand, a timing jitter measurement for an ‘at’ bit requiresthat it have an edge (only an edge can undergo timing jitter!), whichremoves some bit patterns from the thirty-two. In particular, theone-one and zero-zero combinations of an ‘at’ bit and its predecessorwould never be accompanied by an intervening edge. So, the usual factorof four that would ordinarily correspond to those two bits is replacedby a factor of only two: one for the one-zero combination plus one forthe zero-one combination. This is a reduction by half, so in thisexample there will be at most sixteen Descriptors that will beassociated with actual timing jitter measurements.

Bit position transition information is three-valued (rising edge,falling edge, or no change) so a ‘one on either side’ transitionTemplate could have at most 3³=27 different instantiations, although notall these are realizable, either, since two consecutive transitions inthe same direction are not allowed in conventional two-valued (binary)digital systems. (It will be noted that any desired legitimatetransition Template can also be expressed as a collection of one or morecorresponding bit value Templates.)

The essence of Step IV is to find from an inspection of the Original TIERecord 28 in conjunction with the Acquisition Record 26, and for eachDescriptor, a usable TIE-like record of what the value of some parameterof interest is for each instance of that (each) Descriptor. A usefulparameter is the TIE value for the edge at the location associated withthat instance of the Descriptor. Let us call these ‘Descriptor TIERecords’ (29-32). There will be one such Descriptor TIE Record for eachDescriptor. (Unless, of course, some Descriptors never occurred in thedata—a fact probably worth reporting to the operator, as it suggestseither that the Test Pattern is not robust or that the Template isoverly ambitious . . . .) It will be noted that the TIE amounts in anyone of the Records 29-32 are generally not equal. That is because theywill individually also include the effects of RJ and PJ. It is NOTexpected that they differ owing to varying amounts of DDJ. DDJ ought tobe essentially the same for each TIE value in one such record, as thatis the purpose of identifying Descriptors in the first place. If thereare different instances of Data Dependence in DDJ, they are expected tobe associated with different Descriptors! If they aren't, then adifferent (and perhaps more complicated?) Template is in order. (Thatis, it could happen that the mechanism causing DDJ has more ‘internalstates’ than the Template has Descriptors.)

Accordingly, in Step V we average the individual TIE values in each ofthe Descriptor TIE Records 29-32 to produce a respective collection ofMetrics. Each Metric in the collection is associated with a respectiveDescriptor. The averaging removes the jitter owing to RJ and PJ, leavingjust the different values of DDJ for each of the various Descriptors.

In FIG. 5 a Look Up Table (LUT) 33 is shown that is indexed or addressedby symbols or encoding that represent the various Descriptors. So, forexample, if the Template were the bit pattern of the two bits before andthe two bits after a bit of interest, there would (at most) need to be2⁵=32 different entries in the LUT 33, and the simplest way to indexthose entries would be to do it using those five bits as the LeastSignificant Bit (LSB) portion of an address (34) applied to the segmentof memory used to create the table. Of course, what is loaded into theLUT, and subsequently read out from those indexed locations, are theMetrics (averaged values) 35 from the Descriptor TIE Records 29-32 (thatis, the discovered respective values of DDJ for the Descriptorsassociated with the specified Template).

The LUT 33 of FIG. 5 gives us a powerful tool to remove DDJ from thecomplete Original TIE Record 28 of FIG. 4, as can be appreciated withreference now to FIG. 6. That complete Original TIE Record 28, it willbe recalled, is actually a TIE record for TJ (36), and it has an entryfor each edge in the arbitrary Test Pattern. Using the LUT 33 we canmake a corresponding Discovered DDJ TIE Record 37 whose entries aresolely DDJ for each edge. The edges in each case are the same edges, sothese two TIE Records (28/36, 37) will be in one-to-one correspondence.We arrange to subtract each DDJ value from its corresponding TJ value toobtain a resulting Adjusted TIE Record 38 whose entries representPJ{circle around (×)}RJ. THAT Adjusted TIE Record (38) can now beprocessed in a suitable manner (not discussed here) to separate PJ fromRJ as part of a larger overall jitter analysis process.

Of course, the graphical style of subtraction shown in FIG. 6 isintended to promote an appreciation of what such a subtraction provides,what it means and why it works, more than suggesting that two storedimages are somehow subjected to signed subtraction. In terms of actualimplementation, what one can expect to find is a section of programmingin an embedded system for jitter measurement and analysis that accessescorresponding entries in appropriate TIE data structures, forms theirdifference and stores those differences in yet another TIE datastructure.

Now that the basic method has been set out for jitter measurement andanalysis using timing jitter as an example, it is useful to discuss someadditional considerations. First, we shall make some observations aboutTemplates and Descriptors, about addressing the LUT, extensibility ofDDJ measurements over larger amounts of data, and then about replacingthe LUT with a computational rule. Finally, we shall describe what thesimilarities and differences are for measurement and analysis betweentiming jitter and voltage jitter.

As for Templates and their Descriptors, it will be noted that while wehave given a few examples, we have not set out an entire collection ofthem and asserted that “These are the only tools that are frequentlyused . . . ” To the contrary, we assume that a user interface within ajitter analysis system provides a way to specify the Template. It maywell be the case that certain templates such as ‘two before, at, and twoafter’ and ‘three before, at, and three after’ are often enough usedthat they are provided as menu choices. On the other hand, it is alsoenvisioned that a flexible ‘do it yourself’ mechanism is also provided,since it is understandable that in many cases the particular nature ofthe jitter is specific to circumstances in the system beinginvestigated. The jitter analysis system might (as assumed above)compute all the Descriptors for a Template from a symbolic definition ofthat Template, or, a user might be obliged to construe the Template asan abstraction that only she knows about, and for which she must providethe Descriptors herself (if her jitter analyzer is a brand X economymodel . . . ). This is, of course, an issue at the user interface level,and is one that we have not really addressed, since it is not, in and ofitself, a part of the basic technique for actually finding DDJ. Anexample illustrating the utility of the ‘do it yourself’ mechanism mightbe one involving reflections. A knowledge of how internal busses werelaid out and how they fed data to different items along their lengthwould probably influence the choice of a Template intended tocharacterize reflection influenced DDJ. We would expect, then, that asuitable user interface would allow for variable numbers of bits to bespecified, as well as their relative locations (contiguous orotherwise). Of course, a Template might be specified as independent bitvalues at certain locations relative to an edge of interest, or as bitlocations where a particular kind of transition occurs. This last is abit of an abstraction, to be sure, but it nevertheless reduces to adefinite collection of possible bit sequences (Descriptors) that the bitpattern of the Acquisition Record can be investigated for.

It may be necessary to try several different Templates on theAcquisition Record to determine one that produces satisfactory results.That is, a trial Template that is too simple (say, ‘two before, at, twoafter’) for a state of affairs that is truly complex may give resultsthat are significantly different from a seemingly similar Template (say,‘three before, at, three after’), while both the four before and afterand the five before and after Templates produce results that areessentially in agreement. If we further suppose that an easy to usejitter analysis system is also equipped with a report generator thatindicates the definition of the Template, shows the tabular resultsdiscovered for DDJ according to Descriptor, as well as perhaps someother indicators of performance or confidence (the number of instancesand the variance associated with each Metric), such comparisons betweenresults for trial Templates are, while maybe not fun, at least doable.

We have said in several places that the bit locations of interest in aTemplate need not be adjacent or contiguous. Suppose, for the sake of anexample, that we are intent on using a ten-bit Template that has twogroups of five adjacent bits (say, the later one in time—the ‘victim,’as it were—is ‘two before, at, two after’ and the earlier one—the‘culprit’—is simply five consecutive bits) but where there are twentybits between the two groups (say, we suspect mischief caused areflection). Does this mean that the Template has to be thirty bits inall, and that an enormous amount of memory is needed to construct theLUT? Not at all! The intervening twenty bits are don't cares, and can beignored in the encoding of the Descriptors. In this case the Descriptorswould be just ten-bit patterns; five bits of pattern for each generalregion of interest. The twenty-bit separation is accounted for in theway the Acquisition Record is investigated, and is just an offsetbetween two locations that provide data that, once obtained, can betreated as if it all came from a single place. Additional such‘separated regions’ in a Template can account for more than one separatereflection or for subsequent re-reflections of an individual reflection.

It will also be appreciated that DDJ is expected to be essentially aproperty of the SUT and not of the data itself. (Bear in mind also thatthe answers we get depend strongly on the questions we ask, so theTemplate in use is a ‘window’ through which we view the DDJ landscape.We must always be mindful that the view we see is affected by the‘shape’ of that window . . . .) So, once a particular SUT has had its‘DDJ profile’ (think: “LUT contents for a given Template we are inclinedto trust”) discovered using a suitable Test Pattern, that profileremains in force for all other data that the system might send orreceive. Thus, if we are so inclined, we can obtain for that particularsystem a DDJ profile of interest just once and then use it tocharacterize amounts of DDJ that occur for other data without having tomeasure a new profile.

On the other hand, we may wish to increase the precision with which DDJand the other types of jitter are found. One way to do this is to simplyuse a longer Test Pattern. However, we may be limited in that enterpriseby the amount of memory that can be devoted to storing samples and areconstruction of the waveform. Perhaps two (or more) separatemeasurements using the same Template can be combined to produce the sameincrease in precision. It turns out that this is possible. The first,and safest, way is to not discard the Descriptor TIE Records for theearlier measurement(s). Proceed to make a subsequent measurement andproduce new Descriptor TIE Records. Upon reflection, it will beappreciated that respective instances of these for the same Descriptorcan simply be merged into one Record! Now averages (Metrics forDescriptors) for a larger data set are produced, which, it can beargued, have greater precision. Another way is to simply average thecontents of the LUTs that are produced for different measurements. This,however, produces an ‘average of averages’ that, as is well known, isnot a correct average of the original data unless various precautionsare taken (equal numbers of samples, etc.). However, with large enoughdata sets of roughly the same size that source of error might not be aserious concern.

We have used a LUT to serve as a data retrieval mechanism for data thathave been discovered as related to a collection of Descriptors. Once thediscovery is complete and the LUT is loaded, we index with a Descriptorand out pops a Metric. Other retrieval mechanisms are possible. The LUTcould be replaced with a closed form computational rule that used as itsinput variables an ordered numerical representation of the variousDescriptors, and that when evaluated produced the Metric that wouldotherwise have been stored in the LUT for the corresponding Descriptor.Such a computational rule can be found with conventional curve fittingtechniques once the various Metrics have been found and the variousDescriptors arranged or encoded to serve as a suitable independentvariable. (A table having ten-bit Descriptors might, in principle, havea replacement system of linear functions whose independent variables arethose ten bits or one of some other form having a single integervariable ranging from zero to one thousand twenty-three.) It will benoted that this particular scheme for replacing the LUT is essentiallyan alternate form of retrieval of that which has already been found, andthat it does not afford any significant additional analysis of thenature of the jitter. That is, if you looked at the equations found tocompute the Metrics, you likely would not learn anything you didn'talready know from a thoughtful inspection of the tabular results thatwould otherwise be in the LUT.

Let's consider another application of the jitter measurement mechanismsthat we have described. We have so far dealt with timing jitter in edgesmeasured by sampling oscillographic techniques. That is, it has beennecessary to reconstruct with DSP techniques the actual trajectory ofthe waveform from samples that were taken at known times. From that weinfer the times of transition, and from those the various Acquisitionand TIE Records. That such inferences are valid is the intellectualunderpinning of modern DSOs. But there is another architecture for adigital instrument that measures digital waveforms. It is perhaps not aspopular as it once was, but it still exists: the Timing Analyzer (TA). ATiming Analyzer does not digitize a waveform in the usual sense. Itcharacterizes its amplitude as being above or below a threshold thatseparates the logic values of ONE and ZERO. It can, however, report whenalong a time axis these transitions occurred, just as a DSO does.

A Timing Analyzers doesn't usually have the robust time axis capabilitythat a high end DSO would have, but it certainly could have. Most TA'slook at many channels of input data simultaneously, say enough tocharacterize an entire bus. They can have very sophisticated thresholddetection mechanisms, and if it were desired we could send the TA a TestPattern and arrange to measure, for each signal in a collection (bus) ofsignals, a stream of logic values and their times of transitions. Thatis, for each signal we would have an Acquisition Record reporting alogic value/time of transition that could be processed into anassociated collection of TIE Records that are each processed for timingjitter as described above. Now we could have simultaneous jittermeasurements for the signals belonging to a bus.

FIGS. 7 and 8 illustrate the difference between the DSO and TAapproaches to jitter analysis. In particular, FIG. 7 is a verysimplified block 39 diagram of a DSO that is equipped to perform thetype of jitter analysis described herein.

In FIG. 7 a Signal Under Test 40 is probed and after Signal Conditioning(41) is applied to a High Speed Digitizer 42. It performs high speedanalog to digital conversion with sufficient resolution (say, eight orten bits) at a suitable rate. The Digitizer 42 operates in a periodicmanner asynchronous with the data and in conjunction with a Time Base43, such that the samples taken are supplied, along with an indicationof when they occurred, as (voltage, time) pairs to a Memory 44. We havesuppressed all details connected with the issue of triggering, as whatis shown is sufficient to support the notion of acquiring a waveform.The acquired waveform that is stored in the memory is processed by theDSP Algorithms 45 to become an Acquisition Record 46, which is alsodepicted in FIG. 4 (26). The Acquisition Record is formed into a TIE/VLERecord 47, and then processed as described above by a Jitter AnalysisSub-System 48.

FIG. 8 is a very simplified block diagram 49 of a Timing Analyzer thathas been adapted to perform the type of jitter analysis described above.In FIG. 8 a collection 50 of Signals Under Test is probed and afterSignal Conditioning 51 are applied to a collection of ThresholdDetectors 52. Each Threshold Detector operates asynchronously andindependently to signal when its applied input meets the voltage levelsthat define the logic values in use. Each Threshold Detector alsocooperates with a Time Base 53 so that the occurrence of a transitionand its time of occurrence are available as a unit of information thatcan be stored in a Memory 54. This Memory would likely be an elaboratemulti-port affair with provisions to correctly handle the simultaneousand near simultaneous occurrence of many such transition/time pairs.This sort of thing is what Timing Analyzers do, and is believed to beconventional. We note that it may be desirable to use a more robust TimeBase than is usual, if the jitter analysis is to be comparable to thatobtainable with a DSO. In any event, once the transition/time data isstored in the Memory 54, an Acquisition Record 55 can be produced foreach channel, along with corresponding TIE Records 56. The JitterAnalysis Sub-System 57 is essentially the same as System 48 of FIG. 7,save that System 57 of FIG. 8 handles more channels of data, and mightnot be capable of creating VLE Records (since a TA has hardwarethreshold comparison ability, but does not have an Analog to DigitalConverter (ADC) for digitizing).

A Timing Analyzer or a multi-channel DSO that characterizes the jitterof parallel bits arriving over a parallel bus can measure Data DependentSkew (DDS) instead of DDJ. We shall need one set of Acquisition Records26 and associated respective TIE/VLE Records 28 and 29-32 for eachchannel of the bus. The parameter for the skew could be either thedifference between the earliest and latest edges of an arriving pattern,or it could be the RMS value of all the bits, or it could be just for aselected bit, or individual one of any or all of the bits. Averagedparameters for a Descriptor will produce a Metric, as before. But now wehave an extra dimension (bus width) within which to define theDescriptors. A Descriptor can now be thought of as a location in a twodimensional matrix that is the width of the bus in one dimension and thenumber and location of the clock cycles of the bus for which parameters(the raw data) are observed. Now we need a larger LUT that mimics thatmatrix, in that we can index it with all the different combinations. Wenote that there is a temptation to use two LUTs, each separately indexedby one dimension. Such a short-cut will likely prove unsatisfactory,since the ‘Data Dependence’ of the DDS is likely operative in bothdimensions. (These dimensions are Descriptors for earlier and later intime, as already discussed, and similar Descriptors for conditions backand forth across the width of the bus). This means that it is thecombination of circumstances that influences the outcome, and thatneither of the two portions of the complete Descriptor are likely to bethe sole independent variable upon which the outcome depends.

The timing of transitions is not the only parameter in a digital signalthat is susceptible to jitter. Let us return to the DSO environment withwhich we began. If we were to examine a waveform of a digital signal wewould discover that a ONE is not always the same steady voltage from oneinstance to the next, nor is a ZERO always the same voltage. It turnsout that these voltage variations (noise) can have the same generalparadigm of FIG. 1 applied to them as was done for timing jitter of FIG.3, only now the ususal term for the variation is voltage noise. So, letus pick a standardized location within a UI to make a voltagemeasurement, say right in the middle of the UI. Just as we used DSPtechniques to reconstruct the actual waveform and infer the actual timeof transition when we didn't actually sample there, we can also use DSPtechniques to infer the actual voltage at the middle of the UI, even ifwe didn't actually take a sample at that time. Now we simply use thesevoltage values in place of what were previously time of transitionvalues, and perform the exact same jitter analysis of FIGS. 4, 5 and 6,beginning with forming an Error Record for all the bits in the TestPattern. In this case, that Error Record is a complete Original VLE(Voltage Level Error) Record (corresponds to 28 of FIG. 4). There may besome choice as to how to determine what voltage value is correct, or,what any ‘error’ is relative to. One might specify an exact correctvalue, a range of satisfactory values, or, a suitable average could beselected as a correct value. We would need such a choice to instantiatethe notion of Voltage Level Error to produce a measured quantity (i.e.,a voltage error). But as far as the jitter measurements on VLE Recordsare concerned, it is in every way a substitution of variables; voltageerror for time error. We then proceed to produce a collection ofDescriptor VLE Records (corresponding to 29-32 of FIG. 4), and extractDDJ (which is now a voltage) as in Step V of FIG. 4. Those extracted ordiscovered DDJ values are then loaded into the LUT 33 of FIG. 5, and thesubtraction of FIG. 6 proceeds as usual, save that a Discovered DDJ VLERecord is subtracted from a measured Original (TJ) VLE Record to producea remaining PJ{circle around (×)}RJ Adjusted VLE Record.

Thus, we see in FIG. 9 an instance 63 of one Unit Interval 60 of someactual signal 59 of interest and its reconstruction 58 after sampling.Once a suitable VLE reference 62 has been specified or automaticallydetermined, the reconstructed waveform 58 can be inspected (it is, afterall, just a sequence of values in memory) to determine the amount ofVoltage Jitter (noise) 61 that is present. From there, VLE Records areproduced, and used in place of the TIE Records during a jitter analysis,as described above.

1. A method of measuring Data Dependent Jitter for a digital signal in aSystem Under Test, comprising the steps of: (a) processing consecutivelysampled values of an instance of an arbitrary Test Pattern in thedigital signal to produce an Acquisition Record; (b) measuring times ofoccurrence of consecutive edges in the Acquisition Record to form acorresponding Original Time Interval Error Record; (c) specifying, via aTemplate, a collection of Descriptors of digital signal behaviors withwhich amounts of Data Dependent Jitter are to be associated, theTemplate specifying at least one bit position or signal value transitionthat is both A) not adjacent to a reference bit location or signal valuetransition of the Template, and B) not contiguous with a set of bitpositions or signal value transitions of the Template that include a bitposition or signal value transition that is adjacent to the referencebit location or signal value transition of the Template; (d) inspectingthe Acquisition Record of Step (a) to find instances of a selectedDescriptor chosen from among those specified in Step (c); (e)identifying in the Original Time Interval Error Record a respective TimeInterval Error value associated with each instance of the selectedDescriptor found in Step (d); (f) subsequent to an instance of Step (e),finding a Metric that is the average of the Time Interval Errors valuesassociated with the found instances of the selected Descriptor in Step(d); (g) repeating Steps (d), (e) and (f) for a different selectedDescriptor until Steps (d), (e) and (f) have been performed for at leasttwo Descriptors in the collection thereof specified in Step (c); and (h)storing each Metric found in Step (f) in a table indexed by the selectedDescriptor for which it was found.
 2. A method as in claim 1 furthercomprising the steps of: (i) selecting an edge of interest in a workdigital signal applied to the System Under Test; (j) identifying aDescriptor associated with the edge selected in Step (i); (k) indexingthe table of Step (h) with the Descriptor identified in Step (j); and(l) retrieving from the table of Step (h) a Metric stored therein at thelocation indexed by Step (k).
 3. A method as in claim 1 furthercomprising the steps of: (i) creating a Discovered DDJ Time IntervalError Record by associating a respective Descriptor with eachconsecutive edge in the Acquisition Record of Step (a), and populatingthe Discovered DDJ Time Interval Error Record with consecutive Metricsobtained by indexing the table of Step (h) with the respectiveDescriptors of this Step (i); (j) subtracting each entry in theDiscovered DDJ Time Interval Error Record of Step (i) from acorresponding respective entry in the Original Time Interval ErrorRecord of Step (b); and (k) storing in an Adjusted Time Interval ErrorRecord the consecutive differences produced by the subtractions of Step(j).
 4. A method as in claim 1 further comprising the steps of: (i)processing consecutively sampled values of an instance of an arbitraryWork Pattern in the digital signal to produce a Work Acquisition Record;(j) creating a Discovered Work Time Interval Error Record by measuringtimes of occurrence for consecutive edges in the Work AcquisitionRecord; (k) creating a Discovered DDJ Time Interval Error Record byassociating a respective Descriptor with each consecutive edge in theWork Acquisition Record, and populating the Discovered DDJ Time IntervalError Record with consecutive Metrics obtained by indexing the table ofStep (h) with the respective Descriptors of this Step (k); (l)subtracting each entry in the Discovered DDJ Time Interval Error Recordof Step (k) from a corresponding respective entry in the Discovered WorkTime Interval Record of Step (j); and (in) storing in an Adjusted WorkTime Interval Error Record the consecutive differences produced by thesubtractions of Step (l).
 5. A method as in claim 1 wherein thearbitrary Test Pattern is pseudo random data.
 6. A method as in claim 1wherein the arbitrary Test Pattern is actual data occurring in theSystem Under Test during normal operation thereof.
 7. A method as inclaim 1 wherein the collection of Descriptors includes a selectedcollection of bit values at bit positions of interest in a specifiedrelation to a reference bit location.
 8. A method as in claim 1 whereinthe collection of Descriptors includes a selected collection ofspecified signal value transitions at bit positions of interest in aspecified relation to a reference bit location.
 9. A method of measuringData Dependent Jitter for a digital signal in a System Under Test,comprising the steps of: (a) processing consecutively sampled values ofan instance of an arbitrary Test Pattern in the digital signal toproduce an Acquisition Record; (b) measuring times of occurrence ofconsecutive edges in the Acquisition Record to form a correspondingOriginal Time Interval Error Record; (c) specifying, via a Template, acollection of Descriptors of digital signal behaviors with which amountsof Data Dependent Jitter are to be associated, the Template specifyingat least one bit position or signal value transition that is both A) notadjacent to a reference bit location or signal value transition of theTemplate. and B) not contiguous with a set of bit positions or signalvalue transitions of the Template that include a bit position or signalvalue transition that is adjacent to the reference bit location orsignal value transition of the Template; (d) inspecting the AcquisitionRecord of Step (a) to find instances of a selected Descriptor chosenfrom among those specified in Step (c); (e) identifying in the OriginalTime Interval Error Record a respective Time Interval Error valueassociated with each instance of the selected Descriptor found in Step(d): (f) subsequent to an instance of Step (e), finding a Metric that isthe average of the Time Interval Errors values associated with the foundinstances of the selected Descriptor in Step (d); (g) repeating Steps(d), (e) and (f) for a different selected Descriptor until Steps (d),(e) and (f) have been performed for at least two Descriptors in thecollection thereof specified in Step (c); (h) storing each Metric foundin Step (f) in a table indexed by the selected Descriptor for which itwas found; and (i) choosing the Template based on a bus layout.
 10. Amethod of measuring Data Dependent Jitter for a digital signal in aSystem Under Test, comprising the steps of: (a) specifying a collectionof Descriptors of digital signal behaviors with which amounts of DataDependent Jitter are to be associated; (b) processing consecutivelysampled values of an instance of a first Arbitrary Pattern in thedigital signal to produce a first Acquisition Record; (c) measuringtimes of occurrence of consecutive edges in the first Acquisition Recordto form a corresponding first Original Time Interval Error Record; (d)inspecting the first Acquisition Record of Step (b) to find instances ofa first selected Descriptor chosen from among those specified in Step(a); (e) identifying in the first Original Time Interval Error Record arespective Time Interval Error value associated with each instance ofthe first selected Descriptor found in Step (d); (f) subsequent to aninstance of Step (e), finding a first Metric that is the average of theTime Interval Errors values associated with the found instances of thefirst selected Descriptor in Step (d); (g) repeating Steps (d), (e) and(f) for a different first selected Descriptor until Steps (d), (e) and(f) have been performed for all Descriptors in the collection thereofspecified in Step (a); (h) processing consecutively sampled values of aninstance of a second Arbitrary Pattern in the digital signal to producea second Acquisition Record; (i) measuring times of occurrence ofconsecutive edges in the second Acquisition Record to form acorresponding second Original Time Interval Error Record; (j) inspectingthe second Acquisition Record of Step (h) to find instances of a secondselected Descriptor chosen from among those specified in Step (a); (k)identifying in the second Original Time Interval Error Record arespective Time Interval Error value associated with each instance ofthe second selected Descriptor found in Step (j); (l) subsequent to aninstance of Step (k), finding a second Metric that is the average of theTime Interval Errors values associated with the found instances of thesecond selected Descriptor in Step (j); (m) repeating Steps (j), (k) and(l) for a different second selected Descriptor until Steps (j), (k) and(l) have been performed for all Descriptors in the collection thereofspecified in Step (a); (n) for each Descriptor, averaging the firstMetric associated with that each Descriptor with a the second Metricassociated with that same each Descriptor, to generate an average ofMetrics for that same each Descriptor; and (o) storing each average ofMetrics found in Step (n) in a table indexed by an associated Descriptorfor which it was found.
 11. A method of measuring Data Dependent Skew ofparallel bits arriving over parallel channels of a parallel bus in aSystem Under Test, comprising the steps of: (a) processing consecutivelysampled values of digital signals received over the parallel channels,to produce an Acquisition Record for each of the parallel channels; (b)measuring times of occurrence of consecutive edges in each of theAcquisition Records, to form corresponding Original Time Interval ErrorRecords for each of the parallel channels; (c) specifying a collectionof Descriptors of digital signal behaviors with which amounts of DataDependent Jitter are to be associated; (d) inspecting the AcquisitionRecords of Step (a) to find instances of a selected Descriptor chosenfrom among those specified in Step (c); (e) identifying in the OriginalTime Interval Error Records a respective Time Interval Error valueassociated with each instance of the selected Descriptor found in Step(d); (f) subsequent to an instance of Step (e), and for each of theparallel channels, finding a Metric that is the average of the TimeInterval Errors values associated with the found instances of theselected Descriptor in Step (d); (g) repeating Steps (d), (e) and (f)for a different selected Descriptor until Steps (d), (e) and (f) havebeen performed for at least two Descriptors in the collection thereofspecified in Step (c); (h) storing each Metric found in Step (f) in atable indexed by the selected Descriptor for which it was found; (i)indexing the table of step (h) with a plurality of Descriptorsassociated with a set of parallel bits, to retrieve Metrics for the setof parallel bits; and (j) using the retrieved Metrics for the set ofparallel bits to measure DataDependent Skew of the set of parallel bits.